Engineering log
Work in development
Pinnacle is currently focused on R&D and public technical evidence. This is a portfolio of active and planned work, not a commercial catalogue.
GPU and streaming rasterizer
A framebuffer-less rasterizer that generates pixels in step with the display beam. The active development track.
SOM sidecar
A deterministic FPGA inference sidecar emitting checksummed decision evidence. Paused September 2026, with a retest under way.
SPU-4 Sentinel
A reusable deterministic FPGA IP block for edge classification. Paused September 2026, with active development planned.