Evidence

Hardware claims here are graded, and the grade is part of the claim.

Silicon-verified — observed on physical hardware, with a dated entry in the evidence ledger giving the build and load commands, the bitstream SHA-256, and the raw captured output.
Testbench-verified — passes simulation against an independent software oracle. Not the same thing.
Unmeasured — stated as such rather than implied.

Every entry also records what it does not establish. Negative results and retracted conclusions stay published; they are not quietly removed.

The full ledger is docs/hardware_evidence.md in the repository. It is the source of truth, and it is long. Three recent results are below.

First video output — 4 September 2026

640×480 at 60 Hz on a physical monitor, driven from an Artix-7 through a three-resistor DAC. Measured timing error 0.006%.

Colour bars on a monitor, generated by the FPGA

Ledger entry §3.8.

First rasterized geometry — 5 September 2026

A triangle produced by the GPU’s coverage rasterizer, not a test pattern. The shape was checked against the design rather than merely observed: base 55% of screen width against 53% predicted, height 60% against 58%, apex centred.

The stair-stepping on the slanted edges is expected and was predicted before it was seen — 0.607 pixels per row, with the horizontal edge straight. A jagged horizontal edge would have indicated a fault.

A red triangle on a monitor, rendered by the FPGA

Ledger entry §3.9.

First depth-resolved image — 6 September 2026

Two overlapping triangles, with each pixel resolved by comparing interpolated depth. The scene was designed so that only a correct depth test could produce the feature being checked: a vertical colour boundary at the exact horizontal centre of the screen, where nothing in the geometry places an edge.

The frame was rendered in simulation and checked against an independent oracle before the bitstream was built — 0 mismatches over 307,200 pixels. Then measured off the photograph:

	predicted	measured
boundary position, fraction of screen width	0.5000	0.5062
the same, after a power cycle and reseat	0.5000	0.4986

Two observations, either side of a confirmed power cycle.

Two overlapping triangles resolved by depth, red and green, on a monitor

Ledger entry §3.10.

What these do not establish

Stated here because the ledger states it: there is no 3D, no projection and no transform — the coordinates are hand-computed constants. There is no shading, no texturing and no antialiasing. There is no host link; the scenes are compiled into the bitstream and are static. Two triangles say nothing about how many the architecture can hold.

The rasterizer holds no framebuffer at all — pixels are generated in step with the display beam. That is the interesting property, and it is also the reason the triangle count is currently small.

The toolchain

All of this is built with a fully open flow — Yosys and nextpnr through openXC7 — with no vendor IDE anywhere in the path.

That constraint shapes the work rather than decorating it. openXC7 cannot place differential outputs, so HDMI is unreachable and the VGA path exists because it is what an open flow can actually build.